Invention Grant
- Patent Title: Circuitry for built-in self-test
- Patent Title (中): 电路内置自检
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Application No.: US13154378Application Date: 2011-06-06
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Publication No.: US08572447B2Publication Date: 2013-10-29
- Inventor: Hervé Le-Gall
- Applicant: Hervé Le-Gall
- Applicant Address: FR Grenoble
- Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee Address: FR Grenoble
- Agency: Wolf, Greenfield & Sacks, P.C.
- Priority: FR1054446 20100607
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G06F11/00 ; G06F7/02 ; H03M13/00
Abstract:
A method of testing a data connection using at least one test sequence, the method including providing a first bit sequence by a first generator; duplicating the first bit sequence to generate a second bit sequence identical to the first; and generating the at least one test sequence based on the first and second bit sequences and transmitting the at least one test sequence over a data connection to be tested.
Public/Granted literature
- US20110302471A1 CIRCUITRY FOR BUILT-IN SELF-TEST Public/Granted day:2011-12-08
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