Semiconductor devices are described that have an extended under ball metallization configured to mitigate dielectric layer cracking due to stress, particularly stress caused by CTE mismatch during thermal cycling tests, dynamic deformation during drop tests, or cyclic bending tests, and so on. In an implementation, the semiconductor package devices include an integrated circuit chip having a solder ball and under ball metallization, formed on the integrated circuit chip, which is configured to receive the solder ball so that the solder ball and the under ball metallization have a contact area there between, wherein the area of the under ball metallization is area greater than the contact area.