Invention Grant
- Patent Title: Nonvolatile semiconductor memory device
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Application No.: US13364602Application Date: 2012-02-02
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Publication No.: US08575684B2Publication Date: 2013-11-05
- Inventor: Takashi Izumida , Nobutoshi Aoki
- Applicant: Takashi Izumida , Nobutoshi Aoki
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-294786 20081118
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L29/423

Abstract:
In a nonvolatile semiconductor memory device provided with memory cell transistors arranged in a direction and a select transistor to select the memory cell transistors, each of the memory cell transistors of a charge trap type are at least composed of a first insulating layer and a first gate electrode respectively, and the select transistor is at least composed of a second insulating layer and a second gate electrode. The first gate electrode is provided with a first silicide layer of a first width formed on the first insulating layer. The second gate electrode is provided with an impurity-doped silicon layer formed on the second insulating layer and with a second silicide layer of a second width formed on the impurity-doped silicon layer. The second silicide has the same composition as the first silicide. The second width is larger than the first width.
Public/Granted literature
- US20120139031A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2012-06-07
Information query
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