Invention Grant
- Patent Title: Robust power plane configuration in printed circuit boards
- Patent Title (中): 印刷电路板中的强大功率平面配置
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Application No.: US13170010Application Date: 2011-06-27
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Publication No.: US08576578B2Publication Date: 2013-11-05
- Inventor: Robert L. Ayers , Michael L. Scollard , Heidi D. Williams
- Applicant: Robert L. Ayers , Michael L. Scollard , Heidi D. Williams
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Kunzler Law Group
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/14

Abstract:
A robust printed circuit board (PCB) that includes at least two power layers that are used in providing power to components connected to the PCB. The power layers may be a power plane layer and a ground plane layer. The power plane layer is situated such that its edge is pulled back a second distance from the planar edge of the PCB. The ground plane layer is situated such that its edge is pulled back a first distance from the planar edge of the PCB. The second distance and the first distance are different, and as a result, the planar edges of the power plane layer and the ground plane layer respectively do not coincide.
Public/Granted literature
- US20120327583A1 ROBUST POWER PLANE CONFIGURATION IN PRINTED CIRCUIT BOARDS Public/Granted day:2012-12-27
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