Invention Grant
US08576604B2 Identifying and correcting a bit error in a FRAM storage unit of a semiconductor device
有权
识别和校正半导体器件的FRAM存储单元中的位错误
- Patent Title: Identifying and correcting a bit error in a FRAM storage unit of a semiconductor device
- Patent Title (中): 识别和校正半导体器件的FRAM存储单元中的位错误
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Application No.: US13366686Application Date: 2012-02-06
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Publication No.: US08576604B2Publication Date: 2013-11-05
- Inventor: Adolf Baumann , Christian Sichert
- Applicant: Adolf Baumann , Christian Sichert
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; W. James Brady; Frederick J. Telecky, Jr.
- Priority: DE102011010946.3 20110210
- Main IPC: G11C11/22
- IPC: G11C11/22

Abstract:
An embodiment of semiconductor device including a control unit and an FRAM storage unit is disclosed. The FRAM storage unit contains FRAM cells. The control unit includes a predetermined test data pattern. The control unit is configured to read the FRAM cells that contain a test data pattern in a margin-mode, compare the read out bit information with the test data pattern to determine whether a bit error is present in the dedicated FRAM cells. When a bit error is present, the control unit is configured to read-out the complete FRAM storage unit in a recovery-mode and refresh all FRAM cells of the FRAM storage unit by writing back the read out bit information to the respective FRAM cells. In the margin-mode, the read operation is performed using a lower read-sensitivity compared to the read operation reading out the complete FRAM storage unit that is performed in the recovery-mode.
Public/Granted literature
- US20120206957A1 Identifying and Correcting a Bit Error in a FRAM Storage Unit of a Semiconductor Device Public/Granted day:2012-08-16
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