Invention Grant
US08576642B2 Method of using multiplexing circuit for high speed, low leakage, column-multiplexing memory devices
有权
使用多路复用电路的方法,用于高速,低泄漏,列复用存储器件
- Patent Title: Method of using multiplexing circuit for high speed, low leakage, column-multiplexing memory devices
- Patent Title (中): 使用多路复用电路的方法,用于高速,低泄漏,列复用存储器件
-
Application No.: US13866782Application Date: 2013-04-19
-
Publication No.: US08576642B2Publication Date: 2013-11-05
- Inventor: Bin-Hau Lo , Yi-Tzu Chen , C. K. Su , Hau-Tai Shieh
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW
- Agency: Lowe Hauptman & Ham, LLP
- Main IPC: G11C7/12
- IPC: G11C7/12

Abstract:
In at least one embodiment, a multiplexer has a plurality of sub-circuits, and each of the plurality of sub-circuits has a first transistor, a second transistor, and a third transistor. Drains of the first transistors are coupled with a first terminal of a fourth transistor, and drains of the second transistors are coupled with a second terminal of the fourth transistor. In at least one embodiment, a method of outputting data using the multiplexer includes turning on the second transistor of a selected one of the plurality of sub-circuits responsive to a clock signal and address information. The second transistor of a non-selected one of the plurality of sub-circuits is turned off. The fourth transistor is turned on responsive to the clock signal.
Public/Granted literature
- US20130229879A1 METHOD OF USING MULTIPLEXING CIRCUIT FOR HIGH SPEED, LOW LEAKAGE, COLUMN-MULTIPLEXING MEMORY DEVICES Public/Granted day:2013-09-05
Information query