Invention Grant
US08576642B2 Method of using multiplexing circuit for high speed, low leakage, column-multiplexing memory devices 有权
使用多路复用电路的方法,用于高速,低泄漏,列复用存储器件

Method of using multiplexing circuit for high speed, low leakage, column-multiplexing memory devices
Abstract:
In at least one embodiment, a multiplexer has a plurality of sub-circuits, and each of the plurality of sub-circuits has a first transistor, a second transistor, and a third transistor. Drains of the first transistors are coupled with a first terminal of a fourth transistor, and drains of the second transistors are coupled with a second terminal of the fourth transistor. In at least one embodiment, a method of outputting data using the multiplexer includes turning on the second transistor of a selected one of the plurality of sub-circuits responsive to a clock signal and address information. The second transistor of a non-selected one of the plurality of sub-circuits is turned off. The fourth transistor is turned on responsive to the clock signal.
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