Invention Grant
US08576648B2 Method of testing data retention of a non-volatile memory cell having a floating gate
有权
测试具有浮动栅极的非易失性存储单元的数据保留的方法
- Patent Title: Method of testing data retention of a non-volatile memory cell having a floating gate
- Patent Title (中): 测试具有浮动栅极的非易失性存储单元的数据保留的方法
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Application No.: US13293056Application Date: 2011-11-09
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Publication No.: US08576648B2Publication Date: 2013-11-05
- Inventor: Viktor Markov , Jong-Won Yoo , Satish Bansal , Alexander Kotov
- Applicant: Viktor Markov , Jong-Won Yoo , Satish Bansal , Alexander Kotov
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP (US)
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C29/50

Abstract:
A method of decreasing the test time to determine data retention (e.g. leakage current) of a memory cell having a floating gate for the storage of charges thereon. The memory cell is characterized by the leakage current having a rate of leakage which is dependent upon the absolute value of the voltage of the floating gate. The memory cell is further characterized by a first erase voltage and a first programming voltage, applied during normal operation, and a first read current detected during normal operation. The method applies a voltage greater than the first erase voltage or greater than the first programming voltage, to over erase the floating gate. The memory cell including the floating gate is subject to a single high temperature bake. The memory cell is then tested for data retention of the floating gate based on the single high temperature bake.
Public/Granted literature
- US20130114337A1 Method Of Testing Data Retention Of A Non-volatile Memory Cell Having A Floating Gate Public/Granted day:2013-05-09
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