Invention Grant
- Patent Title: Hierarchical memory architecture using a concentrator device
- Patent Title (中): 使用集中器设备的分层存储器架构
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Application No.: US12416000Application Date: 2009-03-31
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Publication No.: US08578095B2Publication Date: 2013-11-05
- Inventor: Sean Eilert
- Applicant: Sean Eilert
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: G06F12/00
- IPC: G06F12/00
Abstract:
A hierarchical memory storage using a concentrator device that is located between a processor and memory devices. The concentrator device includes a page buffer, a Phase-Change Memory (PCM) memory array, and a configurable Error-Correcting Code (ECC) engine to accommodate temporary storage for data transfers between the processor and the memory devices.
Public/Granted literature
- US20100250819A1 HIERARCHICAL MEMORY ARCHITECTURE USING A CONCENTRATOR DEVICE Public/Granted day:2010-09-30
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