Invention Grant
US08578322B2 Method and apparatus for AMS simulation of integrated circuit design
有权
集成电路设计AMS仿真的方法与装置
- Patent Title: Method and apparatus for AMS simulation of integrated circuit design
- Patent Title (中): 集成电路设计AMS仿真的方法与装置
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Application No.: US13439469Application Date: 2012-04-04
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Publication No.: US08578322B2Publication Date: 2013-11-05
- Inventor: Pranav Bhushan , Chandrashekar L. Chetput , Timothy Martin O'Leary
- Applicant: Pranav Bhushan , Chandrashekar L. Chetput , Timothy Martin O'Leary
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Kenyon & Kenyon LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method to create an integrated circuit that includes digital and analog components comprising: displaying on a computer system display, user input to the computer system that specifies parameter information to determine a binding between an analog circuit design component and a digital circuit design component; saving the user specified parameter information within a file that also specifies at least a portion of the analog circuit design; associating the analog circuit design component a first design block of an integrated circuit that also includes a second digital design block coupled to the first design block; using parameter information to determine a binding between the first analog circuit design component and the first digital circuit design component; saving the determined binding in computer readable storage media.
Public/Granted literature
- US20120198411A1 METHOD AND APPARATUS FOR AMS SIMULATION OF INTEGRATED CIRCUIT DESIGN Public/Granted day:2012-08-02
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