Invention Grant
- Patent Title: Hybrid mechanism for more efficient emulation and method therefor
- Patent Title (中): 用于更高效仿真的混合机制及其方法
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Application No.: US13311858Application Date: 2011-12-06
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Publication No.: US08578351B2Publication Date: 2013-11-05
- Inventor: Ravi Nair , John Kevin O'Brien , Kathryn Mary O'Brien , Peter Howland Oden , Daniel Arthur Prener
- Applicant: Ravi Nair , John Kevin O'Brien , Kathryn Mary O'Brien , Peter Howland Oden , Daniel Arthur Prener
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: McGinn IP Law Group, PLLC
- Main IPC: G06F9/45
- IPC: G06F9/45 ; G06F9/44

Abstract:
In a host system, a method for using instruction scheduling to efficiently emulate the operation of a target computing system includes preparing, on the host system, an instruction sequence to interpret an instruction written for execution on the target computing system. An instruction scheduling on the instruction sequence is performed, to achieve an efficient instruction level parallelism, for the host system. A separate and independent instruction sequence is inserted, which, when executed simultaneously with the instruction sequence, performs to copy to a separate location a minimum instruction sequence necessary to execute an intent of an interpreted target instruction, the interpreted target instruction being a translation; and modifies the interpreter code such that a next interpretation of the target instruction results in execution of the translated version, thereby removing execution of interpreter overhead.
Public/Granted literature
- US20120089820A1 HYBRID MECHANISM FOR MORE EFFICIENT EMULATION AND METHOD THEREFOR Public/Granted day:2012-04-12
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