Invention Grant
US08588023B2 Semiconductor memory device having selective activation circuit for selectively activating circuit areas
有权
具有用于选择性地激活电路区域的选择性激活电路的半导体存储器件
- Patent Title: Semiconductor memory device having selective activation circuit for selectively activating circuit areas
- Patent Title (中): 具有用于选择性地激活电路区域的选择性激活电路的半导体存储器件
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Application No.: US13463902Application Date: 2012-05-04
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Publication No.: US08588023B2Publication Date: 2013-11-19
- Inventor: Makoto Kitayama
- Applicant: Makoto Kitayama
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2008-320637 20081217
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
A semiconductor memory device includes a plurality of memory banks each including a plurality of circuit areas selected based on an address signal, any one of which is selected by a corresponding bank selective signal (source transistor control signals), and a selective activation circuit that, from among circuit areas included in a memory bank that is selected based on the bank selective signal, activates any one of the circuit areas based on the address signal, and deactivates at least one of rest of the circuit areas. According to the present invention, the power consumption can be reduced in an active state by a dynamic power control in response to an address signal, not by entire power control by an external command.
Public/Granted literature
- US20120224447A1 SEMICONDUCTOR MEMORY DEVICE HAVING SELECTIVE ACTIVATION CIRCUIT FOR SELECTIVELY ACTIVATING CIRCUIT AREAS Public/Granted day:2012-09-06
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