Invention Grant
US08589320B2 Area efficient neuromorphic system that connects a FET in a diode configuration, and a variable resistance material to junctions of neuron circuit blocks
有权
将二极管配置中的FET和可变电阻材料连接到神经元电路块的结的区域有效的神经元系统
- Patent Title: Area efficient neuromorphic system that connects a FET in a diode configuration, and a variable resistance material to junctions of neuron circuit blocks
- Patent Title (中): 将二极管配置中的FET和可变电阻材料连接到神经元电路块的结的区域有效的神经元系统
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Application No.: US13548532Application Date: 2012-07-13
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Publication No.: US08589320B2Publication Date: 2013-11-19
- Inventor: Matthew J. Breitwisch , Chung Hon Lam , Dharmendra S. Modha , Bipin Rajendran
- Applicant: Matthew J. Breitwisch , Chung Hon Lam , Dharmendra S. Modha , Bipin Rajendran
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: G06E1/00
- IPC: G06E1/00

Abstract:
A neuromorphic system includes a plurality of synapse blocks electrically connected to a plurality of neuron circuit blocks. The plurality of synapse blocks includes a plurality of neuromorphic circuits. Each neuromorphic circuit includes a field effect transistor in a diode configuration electrically connected to variable resistance material, where the variable resistance material provides a programmable resistance value. Each neuromorphic circuit also includes a first junction electrically connected to the variable resistance material and an output of one or more of the neuron circuit blocks, and a second junction electrically connected to the field effect transistor and an input of one or more of the neuron circuit blocks.
Public/Granted literature
- US20120284217A1 AREA EFFICIENT NEUROMORPHIC SYSTEM Public/Granted day:2012-11-08
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