Invention Grant
- Patent Title: Physical layer circuit
- Patent Title (中): 物理层电路
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Application No.: US13024846Application Date: 2011-02-10
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Publication No.: US08589606B2Publication Date: 2013-11-19
- Inventor: Katsuharu Chiba
- Applicant: Katsuharu Chiba
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Young & Thompson
- Priority: JP2010-027724 20100210
- Main IPC: G06F7/74
- IPC: G06F7/74

Abstract:
Provided is a physical layer circuit. Upon detecting a connection recognition signal from an output of a differential input terminal, a first detection circuit outputs a first control signal for allowing an upper layer to output a power supply control signal for turning on a power supply of each of a receiver circuit and a recovery conversion circuit. Upon detecting “input absent” based on the bit configuration of parallel data, a second detection circuit outputs a second control signal for allowing the upper layer to output the power supply control signal for turning off the power supply of each of the receiver circuit and the recovery conversion circuit. A control circuit turns off a power supply of the first detection circuit when the second detection circuit detects “input present”, and turns on the power supply of the first detection circuit when the second detection circuit detects “input absent”.
Public/Granted literature
- US20110194652A1 PHYSICAL LAYER CIRCUIT Public/Granted day:2011-08-11
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