Invention Grant
- Patent Title: Multilayer wiring board and manufacturing method thereof
- Patent Title (中): 多层布线板及其制造方法
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Application No.: US12659893Application Date: 2010-03-24
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Publication No.: US08591750B2Publication Date: 2013-11-26
- Inventor: Hiroyuki Uematsu , Kenichi Kawabata , Kenji Nagase
- Applicant: Hiroyuki Uematsu , Kenichi Kawabata , Kenji Nagase
- Applicant Address: JP Tokyo
- Assignee: TDK Corporation
- Current Assignee: TDK Corporation
- Current Assignee Address: JP Tokyo
- Agency: Oliff & Berridge, PLC
- Priority: JP2009-078223 20090327
- Main IPC: H01B13/00
- IPC: H01B13/00 ; H05K1/11 ; H05K1/14

Abstract:
Provided is a method for manufacturing a multilayer wiring board, whereby even if the multilayer wiring board suffers warping or irregularities, thin-film patterns with great uniformity that are to be used as a mask for forming a wiring layer can be obtained in a simple way. A primer-coated metal foil 20 composed of a primer resin layer 21 and a metal layer 22 is placed on a surface of a double-face CCL 10, which is prepared by applying metal layers 12 and 13 onto the surfaces of a support base 11, and the primer-coated metal foil 20 and the double-face CCL 10 are bonded and the primer resin layer 21 is cured. A via Vb is thereafter formed from the metal layer 22 side, and a metal-plate layer 30 is formed on the resulting metal layer 22. After that, the etched down metal-plate layer 30 and the metal layer 22 are patterned, and using the patterned layers as a mask, the primer resin layer 21 is patterned. Using the patterned primer resin layer 21 as a mask, the metal layer 12 of the double-face CCL 10 and the metal-plate layer 30 are patterned to form a wiring pattern.
Public/Granted literature
- US20100243601A1 Multilayer wiring board and manufacturing method thereof Public/Granted day:2010-09-30
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