A method of fabricating a plurality of components using wafer-level processing can include bonding first and second wafer-level substrates together to form a substrate assembly, such that first surfaces of the first and second substrates confront one another, the first substrate having first electrically conductive elements exposed at the first surface thereof, forming second electrically conductive elements contacting the first conductive elements, and processing the second substrate into individual substrate elements. The second conductive elements can extend through a thickness of the first substrate and can be exposed at a second surface thereof opposite the first surface. The processing can include trimming material to produce the substrate elements at least some of which have respective different controlled thicknesses between first surfaces adjacent the first substrate and second surfaces opposite therefrom.