Invention Grant
- Patent Title: Method for manufacturing semiconductor modules
- Patent Title (中): 半导体模块制造方法
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Application No.: US13554605Application Date: 2012-07-20
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Publication No.: US08592257B2Publication Date: 2013-11-26
- Inventor: Mayumi Nakasato , Kouichi Saitou
- Applicant: Mayumi Nakasato , Kouichi Saitou
- Applicant Address: JP Osaka
- Assignee: Sanyo Electric Co., Ltd.
- Current Assignee: Sanyo Electric Co., Ltd.
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2010-011759 20100122
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method for fabricating a semiconductor module includes: bonding a semiconductor substrate onto a first insulating resin layer; dicing the semiconductor substrate into a plurality of individual semiconductor devices; widening the spacings between the adjacent semiconductor devices by expanding the first insulating resin layer in a biaxially stretched manner; fixing the plurality of semiconductor devices to a flat sheet, with a second insulating resin layer held between the plurality of semiconductor devices and the flat sheet, and removing the first insulating resin layer; stacking the plurality of semiconductor devices, a third insulating resin layer, and a metallic plate, in this order, so as to form a laminated body having electrodes by which to electrically connect the device electrodes to the metallic plate; forming a wiring layer by selectively removing the metallic plate and forming a plurality of semiconductor modules; and separating the semiconductor modules into individual units.
Public/Granted literature
- US20120288999A1 METHOD FOR MANUFACTURING SEMICONDUCTOR MODULES Public/Granted day:2012-11-15
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