Invention Grant
- Patent Title: Multilayer printed wiring board
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Application No.: US12649038Application Date: 2009-12-29
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Publication No.: US08592688B2Publication Date: 2013-11-26
- Inventor: Yasushi Inagaki , Katsuyuki Sano
- Applicant: Yasushi Inagaki , Katsuyuki Sano
- Applicant Address: JP Ogaki-shi
- Assignee: Ibiden Co., Ltd.
- Current Assignee: Ibiden Co., Ltd.
- Current Assignee Address: JP Ogaki-shi
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2002-233775 20020809; JP2003-64986 20030311
- Main IPC: H05K1/16
- IPC: H05K1/16

Abstract:
A package substrate free of malfunction or error even with an IC chip in a high frequency range, particularly an IC chip with a frequency exceeding 3 GHz, is provided. A conductor layer 34P on a core substrate 30 is formed to have a thickness of 30 μm and a conductor circuit 58 on an interlayer resin insulating layer 50 is formed to have a thickness of 15 μm. By making the conductor layer 34P thick, it is possible to increase a volume of the conductor itself and decrease resistance. Further, by employing the conductor layer 34 as a power supply layer, it is possible to improve a capability of supplying power to the IC chip.
Public/Granted literature
- US20100101838A1 MULTILAYER PRINTED WIRING BOARD Public/Granted day:2010-04-29
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