Invention Grant
- Patent Title: Method for manufacturing semiconductor device
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Application No.: US13220736Application Date: 2011-08-30
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Publication No.: US08592879B2Publication Date: 2013-11-26
- Inventor: Hideomi Suzawa , Shinya Sasagawa , Akihiro Ishizuka
- Applicant: Hideomi Suzawa , Shinya Sasagawa , Akihiro Ishizuka
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2010-204187 20100913
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/12

Abstract:
Described is a method for manufacturing a semiconductor device. A mask is formed over an insulating film and the mask is reduced in size. An insulating film having a projection is formed using the mask reduced in size, and a transistor whose channel length is reduced is formed using the insulating film having a projection. Further, in manufacturing the transistor, a planarization process is performed on a surface of a gate insulating film which overlaps with a top surface of a fine projection. Thus, the transistor can operate at high speed and the reliability can be improved. In addition, the insulating film is processed into a shape having a projection, whereby a source electrode and a drain electrode can be formed in a self-aligned manner.
Public/Granted literature
- US20120061670A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2012-03-15
Information query
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