Invention Grant
US08592951B2 Semiconductor wafer having W-shaped dummy metal filling section within monitor region
失效
在监视器区域内具有W形虚拟金属填充部分的半导体晶片
- Patent Title: Semiconductor wafer having W-shaped dummy metal filling section within monitor region
- Patent Title (中): 在监视器区域内具有W形虚拟金属填充部分的半导体晶片
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Application No.: US13429804Application Date: 2012-03-26
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Publication No.: US08592951B2Publication Date: 2013-11-26
- Inventor: Kazuo Hashimi , Hidekazu Sato
- Applicant: Kazuo Hashimi , Hidekazu Sato
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2005-365074 20051219
- Main IPC: H01L23/544
- IPC: H01L23/544

Abstract:
A method of manufacturing a semiconductor device forms the semiconductor device in a device region of a semiconductor substrate simultaneously with forming a monitor semiconductor device that includes a gate electrode made of silicon containing material arranged on a gate insulating film in a monitor region of the semiconductor substrate, a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. The gate electrode is removed without removing a gate insulating film by applying pyrolysis hydrogen generated by pyrolysis on the monitor semiconductor device in the monitor region, and the gate insulating film is removed by a wet process. Impurities distribution of a silicon active region appearing after the gate electrode is removed is measured and fed back to a semiconductor manufacturing process.
Public/Granted literature
- US20120181671A1 METHOD FOR EVALUATING IMPURITY DISTRIBUTION UNDER GATE ELECTRODE WITHOUT DAMAGING SILICON SUBSTRATE Public/Granted day:2012-07-19
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