Invention Grant
US08592957B2 Semiconductor device having shield layer and chip-side power supply terminal capacitively coupled therein
失效
具有屏蔽层和电容耦合在其中的芯片侧电源端子的半导体器件
- Patent Title: Semiconductor device having shield layer and chip-side power supply terminal capacitively coupled therein
- Patent Title (中): 具有屏蔽层和电容耦合在其中的芯片侧电源端子的半导体器件
-
Application No.: US13390184Application Date: 2010-06-09
-
Publication No.: US08592957B2Publication Date: 2013-11-26
- Inventor: Yoshiaki Wakabayashi
- Applicant: Yoshiaki Wakabayashi
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Agency: McGinn Intellectual Property Law Group, PLLC
- Priority: JPP2009-189130 20090818
- International Application: PCT/JP2010/003835 WO 20100609
- International Announcement: WO2011/021328 WO 20110224
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L23/34 ; H01L23/48

Abstract:
Provided is a semiconductor device including a wiring board having a first surface on which a board-side ground terminal and a board-side power supply terminal are provided; a semiconductor chip arranged so as to face the first surface of the wiring board, where the first surface faces an opposite surface of the semiconductor chip; a shield layer provided at the semiconductor chip so as to cover an outer surface of the semiconductor chip except for the opposite surface; a chip-side power supply terminal which is provided on the opposite surface and is electrically connected to the board-side power supply terminal; a chip-side ground terminal which is provided on the opposite surface and is electrically connected to the board-side ground terminal and the shield layer; and a first capacitively coupled part by which the shield layer and the chip-side power supply terminal are capacitively coupled with each other.
Public/Granted literature
Information query
IPC分类: