Invention Grant
- Patent Title: Method of fabricating semiconductor device and the semiconductor device
- Patent Title (中): 制造半导体器件和半导体器件的方法
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Application No.: US12729804Application Date: 2010-03-23
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Publication No.: US08592978B2Publication Date: 2013-11-26
- Inventor: Koichi Matsuno , Yoshiaki Himeno
- Applicant: Koichi Matsuno , Yoshiaki Himeno
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-082060 20090330
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
A semiconductor device includes a semiconductor substrate, an insulating film formed above the semiconductor substrate, and a plurality of first buried wirings and a plurality of second buried wirings located in the insulating film at predetermined intervals alternately in a direction parallel to a surface of the semiconductor substrate. Each second buried wiring is formed so that a width between both side surfaces thereof is increased from a lower end toward an upper portion and at an upper surface the width is larger than a width at an upper surface of each first buried wiring.
Public/Granted literature
- US20100244257A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE Public/Granted day:2010-09-30
Information query
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