An output buffer circuit includes first and second output circuits, and those output terminals are coupled to each other. The first output circuit outputs a first signal having a voltage level of a first high potential power supply or a low potential power supply and includes a first output transistor at a high potential side. The second output circuit outputs a second signal having a voltage level of a second high potential power supply, which is lower than the first high potential power supply, or the low potential power supply and includes a second output transistor at a high potential side. A control circuit sets the gate and back gate of at least one of the first and second output transistor to the voltage level of the second high potential power supply when the first high potential power supply is deactivated and the second high potential power supply is activated.