Invention Grant
- Patent Title: Limiting amplifiers
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Application No.: US12613752Application Date: 2009-11-06
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Publication No.: US08593207B2Publication Date: 2013-11-26
- Inventor: Shen-Iuan Liu , Chih-Hung Lee
- Applicant: Shen-Iuan Liu , Chih-Hung Lee
- Applicant Address: TW Hsin-Chu TW Taipei
- Assignee: Mediatek Inc.,National Taiwan University
- Current Assignee: Mediatek Inc.,National Taiwan University
- Current Assignee Address: TW Hsin-Chu TW Taipei
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: G06G7/12
- IPC: G06G7/12

Abstract:
A limiting amplifier with an input stage with dc offset cancellation, identical gain stages, an output buffer and a feedback filter. The input stage receives a differential input signal and outputs a first intermediate differential signal. The gain stages are cascaded to amplify the first intermediate differential signal and generate a second intermediate differential signal, amplified by the output buffer to produce an output signal. The feedback filter provides a dc offset voltage of the output signal to the input stage for the dc offset cancellation. The input stage comprises a resistor network coupled between a pair of input nodes and a power line and comprising a common resistor, a pair of load resistors and a shunt resistor. The load resistors share a common terminal connected to the common resistor that is connected to the power line. The shunt resistor has two terminals respectively connected to the load resistors.
Public/Granted literature
- US20100052787A1 LIMITING AMPLIFIERS Public/Granted day:2010-03-04
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