Invention Grant
- Patent Title: Tile rendering for image processing
- Patent Title (中): 平铺渲染用于图像处理
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Application No.: US12887608Application Date: 2010-09-22
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Publication No.: US08593466B2Publication Date: 2013-11-26
- Inventor: Rasmus Barringer , Tomas G. Akenine-Möller
- Applicant: Rasmus Barringer , Tomas G. Akenine-Möller
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F15/80
- IPC: G06F15/80 ; G06F15/16 ; G06T1/00 ; G06T15/00

Abstract:
The time needed for back-end work can be estimated without actually doing the back-end work. Front-end counters record information for a cost model and heuristics may be used for when to split a tile and ordering work dispatch for cores. A special rasterizer discards triangles and fragments outside a sub-tile.
Public/Granted literature
- US20110298813A1 Tile Rendering for Image Processing Public/Granted day:2011-12-08
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