Circuits and methods for jitter compensation in a receiver system are useful to improve performance. One such circuit includes a combiner block for combining a reference signal with an input signal (Sin) of the circuit, and a converter stage for converting the input signal (Sin) together with the reference signal. The converter stage is clocked by a clock signal modulated by a jitter signal. A forward path having a first mixer unit is provided for multiplying a copy of an output signal (A) of the converter stage with the frequency of the reference signal in order to generate a jitter compensating signal (B). A compensation unit for compensating jitter in the output signal (A) of the converter stage in a direct output path with the jitter compensating signal (B) is also provided.