Invention Grant
- Patent Title: Method for manufacturing multilayer printed wiring board
- Patent Title (中): 多层印刷线路板的制造方法
-
Application No.: US13408597Application Date: 2012-02-29
-
Publication No.: US08595927B2Publication Date: 2013-12-03
- Inventor: Tsutomu Yamauchi , Satoru Kawai
- Applicant: Tsutomu Yamauchi , Satoru Kawai
- Applicant Address: JP Ogaki-shi
- Assignee: Ibiden Co., Ltd.
- Current Assignee: Ibiden Co., Ltd.
- Current Assignee Address: JP Ogaki-shi
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H05K3/10
- IPC: H05K3/10

Abstract:
A method for manufacturing a printed wiring board includes preparing a core substrate having first and second surfaces, forming a penetrating hole from the first surface toward the second surface of the substrate, forming first conductor on the first surface of the substrate, forming second conductor on the second surface of the substrate, and filling conductive material in the hole such that through-hole conductor connecting the first and second conductors is formed. The forming of the hole includes forming a first opening portion on the first-surface side of the substrate, a second opening portion from the bottom of the first portion toward the second surface, and a third opening portion from the bottom of the second portion toward the second surface, and the forming of the hole satisfies X2
Public/Granted literature
- US20120304458A1 METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD Public/Granted day:2012-12-06
Information query