Invention Grant
- Patent Title: Semiconductor device
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Application No.: US13767396Application Date: 2013-02-14
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Publication No.: US08598668B2Publication Date: 2013-12-03
- Inventor: Tomoaki Ikegami , Kazuyuki Nakanishi , Masaki Tamaru
- Applicant: Panasonic Corporation
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2010-114517 20100518
- Main IPC: H01L23/62
- IPC: H01L23/62

Abstract:
A standard cell has gate patterns extending in Y direction and arranged at an equal pitch in X direction. End portions of the gate patterns are located at the same position in Y direction, and have an equal width in X direction. A diode cell is located next to the standard cell in Y direction, and includes a plurality of opposite end portions formed of gate patterns that are opposed to the end portions, in addition to a diffusion layer which functions as a diode.
Public/Granted literature
- US20130154009A1 SEMICONDUCTOR DEVICE Public/Granted day:2013-06-20
Information query
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