Invention Grant
US08598910B1 Timestamping logic with auto-adjust for varying system frequencies
有权
具有自动调整以适应不同系统频率的时间戳逻辑
- Patent Title: Timestamping logic with auto-adjust for varying system frequencies
- Patent Title (中): 具有自动调整以适应不同系统频率的时间戳逻辑
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Application No.: US13565083Application Date: 2012-08-02
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Publication No.: US08598910B1Publication Date: 2013-12-03
- Inventor: John Leshchuk , Joseph A. Manzella , Walter A. Roper
- Applicant: John Leshchuk , Joseph A. Manzella , Walter A. Roper
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H03K19/20 ; H03K19/094 ; H03K5/08 ; H03L5/00 ; H04L7/00 ; H04L25/00 ; H04L25/40

Abstract:
In described embodiments, a timestamp generator includes a fixed clock domain driven by a fixed frequency clock, a core clock domain, coupled to the fixed clock domain, which is driven by a core clock whose frequency is adjustable during an operation of the timestamp generator. A timestamp logic operating in the core clock domain generates a timestamping output of the timestamp generator. A rate generator operating in both the fixed clock domain and the core clock domain generates per clock cycle increments in the fixed clock domain and transfers carry units from the fixed clock domain into the core clock domain, and a timestamp increment generation of the timestamp logic is clocked by the fixed frequency clock provided by the rate generator. A method for enabling timestamp in an ASIC to be accurate with system clock changes is also described.
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