Invention Grant
- Patent Title: Frequency-locked synthesizer with low power consumption and related system and method
- Patent Title (中): 具有低功耗的锁频合成器及相关系统及方法
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Application No.: US13372321Application Date: 2012-02-13
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Publication No.: US08598924B2Publication Date: 2013-12-03
- Inventor: Darrell Lee Ash
- Applicant: Darrell Lee Ash
- Applicant Address: US TX Dallas
- Assignee: RF Monolithics, Inc.
- Current Assignee: RF Monolithics, Inc.
- Current Assignee Address: US TX Dallas
- Main IPC: H03L7/00
- IPC: H03L7/00

Abstract:
An apparatus includes a first oscillator configured to generate a reference signal and a second oscillator configured to generate an output signal having a controllable frequency. The apparatus also includes a frequency difference detector configured to generate a difference signal having a frequency based on a frequency difference between the reference signal and the output signal. The apparatus further includes a discriminator configured to modify the frequency of the output signal based on the difference signal. The frequency difference detector can be configured to generate the difference signal having multiple pulses. The discriminator can be configured to count a number of pulses in the difference signal during a specified time period and to modify the frequency of the output signal based on the counted number of pulses. The specified time period can be adjustable.
Public/Granted literature
- US20130207699A1 FREQUENCY-LOCKED SYNTHESIZER WITH LOW POWER CONSUMPTION AND RELATED SYSTEM AND METHOD Public/Granted day:2013-08-15
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