Invention Grant
- Patent Title: System and method for reducing lock acquisition time of a phase-locked loop
- Patent Title (中): 减少锁相环锁定采集时间的系统和方法
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Application No.: US13080196Application Date: 2011-04-05
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Publication No.: US08599985B2Publication Date: 2013-12-03
- Inventor: Rizwan Ahmed
- Applicant: Rizwan Ahmed
- Applicant Address: US CA Santa Clara
- Assignee: Intel IP Corporation
- Current Assignee: Intel IP Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Baker Botts L.L.P.
- Main IPC: H03L7/08
- IPC: H03L7/08

Abstract:
In accordance with an embodiment of the present disclosure a phase-locked loop comprises a voltage controlled oscillator (VCO) configured to generate an output signal based on an input reference signal. The phase-locked loop further comprises a first charge pump communicatively coupled to a control input of the VCO and configured to generate, for a duration of time following occurrence of an event, a first control signal. The first control signal is independent of the output signal and is for causing the output signal to have a first frequency based on a second frequency of the input reference signal. The phase-locked loop further comprises a second charge pump communicatively coupled to the control input of the VCO. The second charge pump is configured to generate, after the duration of time, a second control signal. The second control signal is adjusted to lock the output signal with the input reference signal according to a phase difference between the output signal and the input reference signal such that the output signal is synchronized with the input reference signal.
Public/Granted literature
- US20120257701A1 System and Method for Reducing Lock Acquisition Time of a Phase-Locked Loop Public/Granted day:2012-10-11
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