Invention Grant
US08599985B2 System and method for reducing lock acquisition time of a phase-locked loop 有权
减少锁相环锁定采集时间的系统和方法

  • Patent Title: System and method for reducing lock acquisition time of a phase-locked loop
  • Patent Title (中): 减少锁相环锁定采集时间的系统和方法
  • Application No.: US13080196
    Application Date: 2011-04-05
  • Publication No.: US08599985B2
    Publication Date: 2013-12-03
  • Inventor: Rizwan Ahmed
  • Applicant: Rizwan Ahmed
  • Applicant Address: US CA Santa Clara
  • Assignee: Intel IP Corporation
  • Current Assignee: Intel IP Corporation
  • Current Assignee Address: US CA Santa Clara
  • Agency: Baker Botts L.L.P.
  • Main IPC: H03L7/08
  • IPC: H03L7/08
System and method for reducing lock acquisition time of a phase-locked loop
Abstract:
In accordance with an embodiment of the present disclosure a phase-locked loop comprises a voltage controlled oscillator (VCO) configured to generate an output signal based on an input reference signal. The phase-locked loop further comprises a first charge pump communicatively coupled to a control input of the VCO and configured to generate, for a duration of time following occurrence of an event, a first control signal. The first control signal is independent of the output signal and is for causing the output signal to have a first frequency based on a second frequency of the input reference signal. The phase-locked loop further comprises a second charge pump communicatively coupled to the control input of the VCO. The second charge pump is configured to generate, after the duration of time, a second control signal. The second control signal is adjusted to lock the output signal with the input reference signal according to a phase difference between the output signal and the input reference signal such that the output signal is synchronized with the input reference signal.
Information query
Patent Agency Ranking
0/0