Invention Grant
- Patent Title: Controllable transaction synchronization for merging peripheral devices
- Patent Title (中): 用于合并外围设备的可控事务同步
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Application No.: US13174436Application Date: 2011-06-30
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Publication No.: US08601198B2Publication Date: 2013-12-03
- Inventor: Chee Hak Teh , Chai Huat Gan , Poh Thiam Teoh , Mary Siaw See Yeoh , Su Wei Lim
- Applicant: Chee Hak Teh , Chai Huat Gan , Poh Thiam Teoh , Mary Siaw See Yeoh , Su Wei Lim
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F13/20
- IPC: G06F13/20 ; G06F13/38

Abstract:
Embodiments of the invention describe a host system capable of associating a PCIe device and another separate device to the same device identifier (e.g., device number). A cycle routing module or logic will identify an I/O transaction involving the device identifier, and route the transaction to one or both of the devices (or, in some instances, identify the I/O transaction as a configuration transaction, and simply update the cycle routing module/logic only). In one embodiment of the invention, a root port of the host system is configured to operate as the above described cycle router.Embodiments of the invention allow for devices to be “merged” into a single device for the host OS. For example, a peripheral devices coupled to the host system via a PCIe link may be “merged” with a peripheral devices coupled to the host system via another PCIe link or a SATA link.
Public/Granted literature
- US20130007332A1 CONTROLLABLE TRANSACTION SYNCHRONIZATION FOR PERIPHERAL DEVICES Public/Granted day:2013-01-03
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