Invention Grant
- Patent Title: Supply margining method and apparatus
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Application No.: US12060057Application Date: 2008-03-31
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Publication No.: US08601292B2Publication Date: 2013-12-03
- Inventor: Son H. Lam , Henry W. Koertzen , Joseph T. Dibene, II , Steven D. Patzer
- Applicant: Son H. Lam , Henry W. Koertzen , Joseph T. Dibene, II , Steven D. Patzer
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F1/00
- IPC: G06F1/00
Abstract:
In accordance with some embodiments, margining routines to determine acceptable voltage command values for specific CPU implementations at one or more different operating levels may be provided.
Public/Granted literature
- US20090249092A1 SUPPLY MARGINING METHOD AND APPARATUS Public/Granted day:2009-10-01
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