Invention Grant
- Patent Title: Partial memory mirroring and error containment
- Patent Title (中): 部分内存镜像和错误控制
-
Application No.: US12807034Application Date: 2010-08-26
-
Publication No.: US08601310B2Publication Date: 2013-12-03
- Inventor: Roland Dreier
- Applicant: Roland Dreier
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agent Cindy Kaplan
- Main IPC: G06F11/07
- IPC: G06F11/07

Abstract:
In one embodiment, an apparatus includes memory comprising a first portion in which data contained therein is mirrored and a second portion wherein data contained therein is not mirrored, a memory allocator for allocating the first portion of the memory to critical data and allocating the second portion of the memory to non-critical data, and a processor for mirroring the critical data and receiving an indication of a memory error. If the memory error occurs in the first portion of the memory, a mirrored copy of the critical data is used. If the memory error occurs in the second portion of the memory, the memory error is contained so that the apparatus can continue to operate programs using the memory not affected by the memory error.
Public/Granted literature
- US20120054543A1 Partial memory mirroring and error containment Public/Granted day:2012-03-01
Information query