Invention Grant
- Patent Title: Multi-voltage domain circuit design verification method
- Patent Title (中): 多电压域电路设计验证方法
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Application No.: US13717646Application Date: 2012-12-17
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Publication No.: US08601426B1Publication Date: 2013-12-03
- Inventor: Huabin Du
- Applicant: Huabin Du
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Priority: CN201210487006 20121126
- Main IPC: G06F9/455
- IPC: G06F9/455 ; G06F17/50
Abstract:
A level shifter physical verification system identifies missing level shifters in a multi-voltage domain integrated circuit design. The system analyzes a physical layout design data file for design to identify domains and signals that cross domains, and connected nets of devices within the IC design having one or more missing level shifters.
Information query
