A decoder reads an instruction for information specifying a bit sequence storage area, information indicating a first bit range, and information indicating a second bit range that is contiguous with the first bit range, then outputs a decoded signal in response to the information so read, and a bit manipulation circuit generates and outputs an output sequence based on a bit sequence stored in the bit sequence storage area by inserting uniform predetermined values between a first bit range and a second bit range in accordance with the decoded signal output from the decoder.