Invention Grant
- Patent Title: A/D conversion integrated circuit
- Patent Title (中): A / D转换集成电路
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Application No.: US13322375Application Date: 2010-05-27
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Publication No.: US08610615B2Publication Date: 2013-12-17
- Inventor: Shoji Kawahito
- Applicant: Shoji Kawahito
- Applicant Address: JP
- Assignee: National University Corporation Shizuoka University
- Current Assignee: National University Corporation Shizuoka University
- Current Assignee Address: JP
- Agency: Ostrolenk Faber LLP
- Priority: JPP2009-128155 20090527
- International Application: PCT/JP2010/059022 WO 20100527
- International Announcement: WO2010/137660 WO 20101202
- Main IPC: H03M1/38
- IPC: H03M1/38

Abstract:
An A/D conversion integrated circuit including a plurality of A/D converters which can inhibit noises from being propagated by capacitive coupling from a conductor which transmits a digital signal is provided. In an A/D converter 13, an input 15 receives an analog signal to be A/D converted. An output 17 provides at least a part of a digital signal SD having a predetermined number of bits representing the analog signal SA. In response to an analog signal SA, a sub-A/D conversion circuit 19 generates a signal SDP representing one or a plurality of bit values of the digital signal SD and feeds the signal SDP to the output 17. An input 21a of a control circuit 21 is connected to an output 19a of the sub-A/D conversion circuit 19 and provides a control signal SCONT corresponding to the signal SDP. The control signal SCONT has a waveform including a transition from a voltage level L1 to a voltage level L2 and a transition from the voltage level L2 to the voltage level L1.
Public/Granted literature
- US20120127004A1 A/D CONVERSION INTEGRATED CIRCUIT Public/Granted day:2012-05-24
Information query
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