Invention Grant
- Patent Title: Apparatus for aiding design of semiconductor device and method
- Patent Title (中): 用于辅助半导体器件设计的方法和方法
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Application No.: US12727701Application Date: 2010-03-19
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Publication No.: US08612906B2Publication Date: 2013-12-17
- Inventor: Kenichi Nabeya
- Applicant: Kenichi Nabeya
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2009-084179 20090331
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
An apparatus for aiding a design of a semiconductor device including a plurality of wirings, the apparatus has a display, a memory that stores information corresponding to the wirings, and a processor that obtains a power consumption value of each wiring in reference to the information about the wirings stored in the memory, and displays each of the wirings on the display in a manner that each wiring is distinguishable as to the obtained power consumption value of the each wiring.
Public/Granted literature
- US20100251194A1 APPARATUS FOR AIDING DESIGN OF SEMICONDUCTOR DEVICE AND METHOD Public/Granted day:2010-09-30
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