Invention Grant
- Patent Title: Dynamic optimization for removal of strong atomicity barriers
- Patent Title (中): 动态优化去除强原子性屏障
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Application No.: US12142102Application Date: 2008-06-19
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Publication No.: US08612950B2Publication Date: 2013-12-17
- Inventor: Tatiana Shpeisman , Vijay Menon , Ali-Reza Adl-Tabatabai
- Applicant: Tatiana Shpeisman , Vijay Menon , Ali-Reza Adl-Tabatabai
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Hanley, Flight & Zimmerman, LLC.
- Main IPC: G06F9/45
- IPC: G06F9/45

Abstract:
A method and apparatus for dynamic optimization of strong atomicity barriers is herein described. During runtime compilation, code including non-transactional memory accesses that are to conflict with transactional memory accesses is patched to insert transactional barriers at the conflicting non-transactional memory accesses to ensure isolation and strong atomicity. However, barriers are omitted or removed from non-transactional memory accesses that do not conflict with transactional memory accesses to reduce barrier execution overhead.
Public/Granted literature
- US20090319739A1 DYNAMIC OPTIMIZATION FOR REMOVAL OF STRONG ATOMICITY BARRIERS Public/Granted day:2009-12-24
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