Invention Grant
- Patent Title: Insulated gate semiconductor device
- Patent Title (中): 绝缘栅半导体器件
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Application No.: US13313050Application Date: 2011-12-07
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Publication No.: US08614483B2Publication Date: 2013-12-24
- Inventor: Hiromitsu Tanabe , Yukio Tsuzuki , Kenji Kouno , Tomofusa Shiga
- Applicant: Hiromitsu Tanabe , Yukio Tsuzuki , Kenji Kouno , Tomofusa Shiga
- Applicant Address: JP Kariya
- Assignee: DENSO CORPORATION
- Current Assignee: DENSO CORPORATION
- Current Assignee Address: JP Kariya
- Agency: Posz Law Group, PLC
- Priority: JP2010-273569 20101208; JP2011-251427 20111117
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
An insulated gate semiconductor device includes a first conductivity-type semiconductor substrate, a second conductivity-type base layer on a first surface side of the substrate, a trench dividing the base layer into channel and floating layers, and a first conductivity-type emitter region that is formed in the channel layer and in contact with the trench. The semiconductor device includes a gate insulation layer in the trench, a gate electrode on the insulation layer, an emitter electrode electrically connected to the emitter region and the floating layer, a second conductivity-type collector layer in the substrate, and a collector electrode on the collector layer. The floating layer has a lower impurity concentration than the channel layer. The floating layer has a first conductivity-type hole stopper layer located at a predetermined depth from the first surface of the substrate and at least partially spaced from the insulation layer.
Public/Granted literature
- US20120146091A1 INSULATED GATE SEMICONDUCTOR DEVICE Public/Granted day:2012-06-14
Information query
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