Invention Grant
US08623749B2 Reduction of stored charge in the base region of a bipolar transistor to improve switching speed
有权
在双极晶体管的基极区域中减少存储电荷以提高开关速度
- Patent Title: Reduction of stored charge in the base region of a bipolar transistor to improve switching speed
- Patent Title (中): 在双极晶体管的基极区域中减少存储电荷以提高开关速度
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Application No.: US13330340Application Date: 2011-12-19
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Publication No.: US08623749B2Publication Date: 2014-01-07
- Inventor: David Neil Casey
- Applicant: David Neil Casey
- Applicant Address: US TX Plano
- Assignee: Diodes Incorporated
- Current Assignee: Diodes Incorporated
- Current Assignee Address: US TX Plano
- Main IPC: H01L21/22
- IPC: H01L21/22 ; H01L21/38 ; H01L21/331 ; H01L29/66
Abstract:
In one embodiment, a method includes forming a base region for a transistor using a base mask and forming a contact region to the base region. The contact region is formed in an area that is at least partially outside of the base mask. The method then forms an emitter region in a diffused base region. The base region diffuses outwardly to be formed under the contact region.
Public/Granted literature
- US20120322219A1 Reduction of Stored Charge in the Base Region of a Bipolar Transistor to Improve Switching Speed Public/Granted day:2012-12-20
Information query
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