Invention Grant
- Patent Title: Method of forming patterns of semiconductor device
- Patent Title (中): 形成半导体器件图案的方法
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Application No.: US12493823Application Date: 2009-06-29
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Publication No.: US08623772B2Publication Date: 2014-01-07
- Inventor: Jae Doo Eom
- Applicant: Jae Doo Eom
- Applicant Address: KR Icheon-Si
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Icheon-Si
- Agency: Marshall, Gerstein & Borun LLP
- Agent James P. Zeller
- Priority: KR10-2009-0005418 20090122
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/461

Abstract:
A method of forming patterns of a semiconductor device includes forming a hard mask layer and a first sacrificial layer over a first region and a second region of a semiconductor substrate, etching the first sacrificial layer to form a first sacrificial pattern having a first width in the first region and second sacrificial patterns having a second width in the second region, wherein the second width is narrower than the first width, forming a first spacer surrounding sidewalls of the first sacrificial pattern and a second spacer surrounding sidewalls of the second sacrificial patterns, removing the first and the second sacrificial patterns; and etching the first and second spacers.
Public/Granted literature
- US20100184287A1 Method of Forming Patterns of Semiconductor Device Public/Granted day:2010-07-22
Information query
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