Invention Grant
US08624352B2 Mitigation of detrimental breakdown of a high dielectric constant metal-insulator-metal capacitor in a capacitor bank
有权
减轻电容器组中高介电常数金属 - 绝缘体 - 金属电容器的有害击穿
- Patent Title: Mitigation of detrimental breakdown of a high dielectric constant metal-insulator-metal capacitor in a capacitor bank
- Patent Title (中): 减轻电容器组中高介电常数金属 - 绝缘体 - 金属电容器的有害击穿
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Application No.: US12953624Application Date: 2010-11-24
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Publication No.: US08624352B2Publication Date: 2014-01-07
- Inventor: Bonnie E. Weir , Edward B. Harris , Ramnath Venkatraman
- Applicant: Bonnie E. Weir , Edward B. Harris , Ramnath Venkatraman
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Main IPC: H01L23/52
- IPC: H01L23/52
Abstract:
An IC capacitor bank includes a plurality of high-k metal-insulator-metal (MIM) capacitors connected to a pair of conductive traces. A fusible trace located on an end of one of the pair of conductive traces forms a capacitor column connected between supply lines, such that failure of a dielectric in the MIM capacitors causes the fusible trace to at least partially open thereby limiting a fault current in the capacitor column. Additionally, a method of manufacturing an IC capacitor bank includes providing a plurality of high-k metal-insulator-metal (MIM) capacitors connected to a pair of conductive traces and locating a fusible trace on an end of the pair of conductive traces to form a capacitor column that is connected between supply lines, such that failure of a dielectric in the MIM capacitors causes the fusible trace to at least partially open thereby limiting a fault current in the capacitor column.
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