Invention Grant
US08624630B2 Clock and data recovery system, phase adjusting method, and phasedetector 有权
时钟和数据恢复系统,相位调整方法和定时检测器

  • Patent Title: Clock and data recovery system, phase adjusting method, and phasedetector
  • Patent Title (中): 时钟和数据恢复系统,相位调整方法和定时检测器
  • Application No.: US13575595
    Application Date: 2011-04-18
  • Publication No.: US08624630B2
    Publication Date: 2014-01-07
  • Inventor: Jiansheng LiaoShanyong Cao
  • Applicant: Jiansheng LiaoShanyong Cao
  • Applicant Address: CN Shenzhen, Guangdong Province
  • Assignee: ZTE Corporation
  • Current Assignee: ZTE Corporation
  • Current Assignee Address: CN Shenzhen, Guangdong Province
  • Agency: Foley & Lardner LLP
  • Priority: CN201010245170 20100726
  • International Application: PCT/CN2011/072954 WO 20110418
  • International Announcement: WO2012/013051 WO 20120202
  • Main IPC: H03D13/00
  • IPC: H03D13/00
Clock and data recovery system, phase adjusting method, and phasedetector
Abstract:
Disclosed is a phase discriminator, including: a first XOR gate connected to a trigger and a delay unit, a second XOR gate connected to the trigger and a latch, wherein the first XOR gate is a current mode logic XOR gate, the first XOR gate comprises a first offset current source circuit outputting a first adjustable offset circuit for controlling amplitude of the error signal output by the first XOR gate; and/or, the second XOR gate is a current mode logic XOR gate, the second XOR gate comprises a second offset current source circuit outputting a second adjustable offset circuit for controlling amplitude of reference signal output by the second XOR gate. Also disclosed are a clock and data recovery system and a phase adjustment method. The present invention can prevent introducing noise coupling to the voltage control oscillator (VCO) module.
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