Invention Grant
- Patent Title: Interpolation circuit and receiving circuit
- Patent Title (中): 插值电路和接收电路
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Application No.: US13709481Application Date: 2012-12-10
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Publication No.: US08624651B2Publication Date: 2014-01-07
- Inventor: Takushi Hashida , Yoshiyasu Doi
- Applicant: Fujitsu Limited
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Fujitsu Patent Center
- Priority: JP2012-070352 20120326
- Main IPC: H03H11/16
- IPC: H03H11/16

Abstract:
An interpolation circuit includes: a generation circuit that generates interpolation data from a plurality of pieces of input data, using an interpolation coefficient, among input data inputted in time series including a data point and a transition point; a detection circuit that detects that the input data lacks at the data point; and a coefficient circuit that changes the interpolation coefficient for each given data interval, and skips a position for changing the interpolation coefficient to the transition point when the detection circuit detects the lack of the input data.
Public/Granted literature
- US20130249600A1 INTERPOLATION CIRCUIT AND RECEIVING CIRCUIT Public/Granted day:2013-09-26
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