A comparison section includes an analog signal to be subjected to AD conversion to a reference signal that increases or decreases with the passage of time, and terminates a comparison process at a timing at which the reference signal has satisfied a predetermined condition for the analog signal. A first count section counts a clock signal of a predetermined frequency as a count clock and outputs a count value. A latch section latches the count value output from the first count section. A latch control section enables the latch section at a first timing related to an end of the comparison process and causes the latch section to execute a latch operation at a second timing delayed by a predetermined time from the first timing.