Invention Grant
US08625382B2 Block-row decoders, memory block-row decoders, memories, methods for deselecting a decoder of a memory and methods of selecting a block of memory
有权
块行解码器,存储器块行解码器,存储器,用于取消存储器解码器的方法和选择存储器块的方法
- Patent Title: Block-row decoders, memory block-row decoders, memories, methods for deselecting a decoder of a memory and methods of selecting a block of memory
- Patent Title (中): 块行解码器,存储器块行解码器,存储器,用于取消存储器解码器的方法和选择存储器块的方法
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Application No.: US13168699Application Date: 2011-06-24
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Publication No.: US08625382B2Publication Date: 2014-01-07
- Inventor: Nicholas Hendrickson
- Applicant: Nicholas Hendrickson
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
Block-row decoders, memory block-row decoders, memories, methods for deselecting a decoder of a memory and methods of selecting a block of memory are disclosed. An example memory block-row decoder includes a plurality of block-row decoders, each of the block-row decoders having a decoder switch tree. Each block-row decoder is configured to bias a block select switch of the decoder switch tree with a first voltage while the block-row decoder is deselected and further configured to bias decoders switches of the decoder switch tree that are coupled to the block select switch with a second voltage while the block-row decoder is deselected, the second voltage less than the first voltage. An example method of deselecting a decoder of a memory includes providing decoder signals having different voltages to decoder switches from at least two different levels of a decoder switch tree while the decoder is deselected.
Public/Granted literature
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