Provided is a pattern matching device comprising memories. On each of the combinations of the values of an N number (N: a natural number) of pattern detection signals outputted from a circuited NFA (Non-deterministic Finite Automaton), the memories store both identifiers indicating patterns corresponding to effective patterns of the N number of pattern detection signals and flags indicating the definitions of the combinations, individually in addresses set according to the combinations. Further comprised are an address creating unit for determining the address of the memory corresponding to the combination of the values of the pattern detection signals, by using the combination of the values of the pattern detection signals outputted from the circuited NFA, and a read control unit for reading the identifiers and the flags stored in the address from the memories while incrementing the addresses determined by the address creating unit, until the flags take a specific value.