Invention Grant
US08627019B2 Method and device of controlling memory area of multi-port memory device in memory link architecture
有权
在存储器链路架构中控制多端口存储器件的存储区域的方法和装置
- Patent Title: Method and device of controlling memory area of multi-port memory device in memory link architecture
- Patent Title (中): 在存储器链路架构中控制多端口存储器件的存储区域的方法和装置
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Application No.: US13323918Application Date: 2011-12-13
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Publication No.: US08627019B2Publication Date: 2014-01-07
- Inventor: Jung Woong Yang
- Applicant: Jung Woong Yang
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2010-0128792 20101216
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A memory area managing method of a multi-port memory device in a memory link architecture which includes a multi-port memory device, a memory controller, and a flash memory, the method including performing a data processing step in which data stored in a host CPU area of the multi-port memory device is processed by a host CPU connected with the multi-port memory device, the processed data being stored in a shared area; performing a file data generating step in which file data on the processed data stored in the shared area is generated according to a write command of the host CPU, the file data being stored in a memory controller area of the multi-port memory device; and performing a file data storing step in which the file data is read out from the memory controller area and the read file data is sent to the flash memory.
Public/Granted literature
- US20120159049A1 METHOD AND DEVICE OF CONTROLLING MEMORY AREA OF MULTI-PORT MEMORY DEVICE IN MEMORY LINK ARCHITECTURE Public/Granted day:2012-06-21
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