Invention Grant
- Patent Title: Lightly doped source/drain last method for dual-epi integration
- Patent Title (中): 轻掺杂源/漏最终方法用于双外延集成
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Application No.: US12716100Application Date: 2010-03-02
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Publication No.: US08633070B2Publication Date: 2014-01-21
- Inventor: Ka-Hing Fung , Haiting Wang , Han-Ting Tsai
- Applicant: Ka-Hing Fung , Haiting Wang , Han-Ting Tsai
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/84
- IPC: H01L21/84

Abstract:
An integrated circuit device and method for fabricating the integrated circuit device is disclosed. The method involves providing a substrate; forming a gate structure over the substrate; forming an epitaxial layer in a source and drain region of the substrate that is interposed by the gate structure; and after forming the epitaxial layer, forming a lightly doped source and drain (LDD) feature in the source and drain region.
Public/Granted literature
- US20110193179A1 LIGHTLY DOPED SOURCE/DRAIN LAST METHOD FOR DUAL-EPI INTEGRATION Public/Granted day:2011-08-11
Information query
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