Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US13144744Application Date: 2009-10-23
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Publication No.: US08633530B2Publication Date: 2014-01-21
- Inventor: Kota Funayama , Hiraku Chakihara , Yasushi Ishii
- Applicant: Kota Funayama , Hiraku Chakihara , Yasushi Ishii
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JPPCT/JP2009/050435 20090115
- International Application: PCT/JP2009/068275 WO 20091023
- International Announcement: WO2010/082389 WO 20100722
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/792 ; H01L21/336 ; H01L27/06
Abstract:
In a power feeding region of a memory cell (MC) in which a sidewall-shaped memory gate electrode (MG) of a memory nMIS (Qnm) is provided by self alignment on a side surface of a selection gate electrode (CG) of a selection nMIS (Qnc) via an insulating film, a plug (PM) which supplies a voltage to the memory gate electrode (MG) is embedded in a contact hole (CM) formed in an interlayer insulating film (9) formed on the memory gate electrode (MG) and is electrically connected to the memory gate electrode (MG). Since a cap insulating film (CAP) is formed on an upper surface of the selection gate electrode (CG), the electrical conduction between the plug (PM) and the selection gate electrode (CG) can be prevented.
Public/Granted literature
- US20110272753A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2011-11-10
Information query
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